DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 42

• Manufacturer Part Number: DS705
• Description: XA Spartan-3A DSP Automotive FPGA Family Data Sheet
• Manufacturer: XILINX [Xilinx, Inc]

DNA Port Timing
Table 44: DNA_PORT Interface Timing
DS705 (v1.1) January 20, 2009
Product Specification
Notes:
1.
T
T
T
T
The minimum READ pulse width is 5 ns, and the maximum READ pulse width is 10 μs.
T
T
T
Symbol
T
T
T
DNADCKO
DNACLKH
DNACLKF
DNACLKL
DNADSU
DNARSU
DNASSU
DNADH
DNARH
DNASH
R
Setup time on SHIFT before the rising edge of CLK
Hold time on SHIFT after the rising edge of CLK
Setup time on DIN before the rising edge of CLK
Hold time on DIN after the rising edge of CLK
Setup time on READ before the rising edge of CLK
Hold time on READ after the rising edge of CLK
Clock-to-output delay on DOUT after rising edge of CLK
CLK frequency
CLK High time
CLK Low time
Description
www.xilinx.com
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Min
1.0
0.5
1.0
0.5
5.0
0.0
0.5
0.0
1.0
1.0
10,000
Max
100
1.5
–
–
–
–
–
•
•
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
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