DS705 XILINX [Xilinx, Inc], DS705 Datasheet - Page 53
![no-image](/images/no-image-200.jpg)
DS705
Manufacturer Part Number
DS705
Description
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Manufacturer
XILINX [Xilinx, Inc]
Datasheet
1.DS705.pdf
(54 pages)
- Current page: 53 of 54
- Download datasheet (2Mb)
IEEE 1149.1/1553 JTAG Test Access Port Timing
X-Ref Target - Figure 15
Table 57: Timing for the JTAG Test Access Port
DS705 (v1.1) January 20, 2009
Product Specification
Notes:
1.
2.
Clock-to-Output Times
T
Setup Times
T
T
Hold Times
T
T
Clock Timing
T
T
T
T
F
Symbol
TCKTDO
TDITCK
TMSTCK
TCKTDI
TCKTMS
CCH
CCL
CCHDNA
CCLDNA
TCK
The numbers in this table are based on the operating conditions set forth in
For details on JTAG, see “JTAG Configuration Mode and Boundary-Scan” in Chapter 9 of UG332, Spartan-3 Generation Configuration User
Guide.
TCK
TMS
TDI
TDO
(Input)
(Input)
(Input)
(Output)
The time from the falling transition on the TCK pin to data appearing at the TDO pin
The time from the setup of data at the
TDI pin to the rising transition at the
TCK pin
The time from the setup of a logic level at the TMS pin to the rising transition at the TCK pin
The time from the rising transition at
the TCK pin to the point when data is
last held at the TDI pin
The time from the rising transition at the TCK pin to the point when a logic level is last held at the
TMS pin
The High pulse width at the TCK pin
The Low pulse width at the TCK pin
The High pulse width at the TCK pin
The Low pulse width at the TCK pin
Frequency of the TCK signal
R
T
TDITCK
T
TMSTCK
All functions except ISC_DNA command
Figure 15: JTAG Waveforms
All functions except those shown below
Boundary-Scan commands
(INTEST, EXTEST, SAMPLE)
All functions except those shown below
Configuration commands (CFG_IN, ISC_PROGRAM)
During ISC_DNA command
BYPASS or HIGHZ instructions
All operations except for BYPASS or HIGHZ instructions
Description
www.xilinx.com
T
TCKTDI
T
TCKTMS
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Table
T
8.
TCKTDO
T
CCH
1/F
TCK
T
CCL
13.0
Min
1.0
7.0
7.0
3.5
10
10
0
0
5
5
0
DS705_16_061908
10,000
10,000
Max
11.0
33
20
–
–
–
–
–
–
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
53
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