ssd1908 Solomon Systech Limited:, ssd1908 Datasheet - Page 64

• Manufacturer Part Number: ssd1908
• Description: Lcd Drivers,lcd Controllers
• Manufacturer: Solomon Systech Limited:

Bits 3-1
Bit 0
Bits 7-0
Bits 7-0
Reset
Reset
Type
state
Type
Solomon Systech
state
Bit
Bit
CV Pulse Burst Length Register
LPWMOUT Duty Cycle Register
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 7
Bit 7
RW
RW
7
0
7
0
CV Pulse Divide Select Bits [2:0]
LPWMOUT
Duty Cycle
CV Pulse
Length
CV Pulse Divide Select Bits [2:0]
The value of these bits represents the power of 2 by which the selected CV Pulse
source is divided.
Note
This divided clock is further divided by 2 before it is output at the LCVOUT.
PWMCLK Source Select
When this bit = 0, the clock source for PWMCLK is CLKI.
When this bit = 1, the clock source for PWMCLK is AUXCLK.
Note
For further information on the PWMCLK source select, see Section 11 “Clocks”.
CV Pulse Burst Length Bits [7:0]
The value of this register determines the number of pulses generated in a single CV
Pulse burst:
Number of pulses in a burst = Bits [7:0] + 1
LPWMOUT Duty Cycle Bits [7:0]
This register determines the duty cycle of the LPWMOUT output.
Burst
Bit 6
Bit 6
RW
RW
6
0
6
0
0h
1h
2h
3h
7h
...
Table 7-18 : CV Pulse Divide Select Options
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 5
Bit 5
RW
RW
5
0
5
0
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 4
Bit 4
RW
RW
4
0
4
0
Oct 2003
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 3
Bit 3
RW
RW
3
0
3
0
P 54/54
CV Pulse Divide Amount
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 2
Bit 2
RW
RW
2
0
2
0
Rev 1.0
128
...
1
2
4
8
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 1
Bit 1
RW
RW
1
0
1
0
SSD1908
REG[B2h]
REG[B3h]
LPWMOUT
Duty Cycle
CV Pulse
Length
Burst
Bit 0
Bit 0
RW
RW
0
0
0
0