ssd1908 Solomon Systech Limited:, ssd1908 Datasheet - Page 91
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ssd1908
Manufacturer Part Number
ssd1908
Description
Lcd Drivers,lcd Controllers
Manufacturer
Solomon Systech Limited:
Datasheet
1.SSD1908.pdf
(167 pages)
- Current page: 91 of 167
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1. t
Note
Minimum three software WAIT states are required.
SSD1908
Symbol
T
f
14
CKIO
CKIO
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
9a
9b
9c
9d
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
is the delay from when data is placed on the bus until the data is latched into the write buffer.
Bus Clock frequency
Bus Clock period
Bus Clock pulse width low
Bus Clock pulse width high
A[17:1], M/R#, RD/WR# setup to CKIO
CSn# high setup to CKIO
BS# setup
BS# hold
CSn# setup
A[17:1], M/R#, RD/WR# hold from CS#
RD# or WEn# asserted for MCLK = BCLK (max.MCLK=50MHz)
RD# or WEn# asserted for MCLK = BCLK ÷2
RD# or WEn# asserted for MCLK = BCLK ÷3
RD# or WEn# asserted for MCLK = BCLK ÷4
Falling edge RD# to D[15:0] driven (read cycle)
Rising edge CSn# to WAIT# high impedance
Falling edge CSn# to WAIT# driven low
CLIO to WAIT# delay
D[15:0] setup to 2
D[15:0] hold (write cycle)
WAIT# rising edge to D[15:0] valid (read cycle)
Rising edge RD# to D[15:0] high impedance (read cycle)
Rev 1.0
P 81/81
nd
CKIO after BS# (write cycle) (see note 1)
Table 10-9 : Hitachi SH-3 Interface Timing
Parameter
Oct 2003
3 T
1/f
CKIO
Min
9
9
1
1
1
2
1
0
3
2
4
0
0
3
CKIO
+ 2
3 T
Max
66
13
18
23
28
12
10
12
18
12
CKIO
Solomon Systech
2
+
Units
T
T
T
T
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
CKIO
CKIO
CKIO
CKIO
ns
ns
ns
ns
ns
ns
ns
ns
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