CY7C1214F-100AC CYPRESS [Cypress Semiconductor], CY7C1214F-100AC Datasheet - Page 9
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CY7C1214F-100AC
Manufacturer Part Number
CY7C1214F-100AC
Description
1-Mb (32K x 32) Flow-Through Sync SRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.CY7C1214F-100AC.pdf
(15 pages)
Document #: 38-05434 Rev. *A
Switching Characteristics
Set-up Times
t
t
t
t
t
t
Hold Times
t
t
t
t
t
t
AS
ADS
ADVS
WES
DS
CES
AH
ADH
WEH
ADVH
DH
CEH
Parameter
Address Set-up before CLK Rise
ADSP, ADSC Set-up before CLK Rise
ADV Set-up before CLK Rise
GW, BWE, BW
Data Input Set-up before CLK Rise
Chip Enable Set-up
Address Hold after CLK Rise
ADSP, ADSC Hold after CLK Rise
GW , BWE , BW
ADV Hold after CLK Rise
Data Input Hold after CLK Rise
Chip Enable Hold after CLK Rise
[A:D]
[A:D]
Over the Operating Range (continued)
Hold after CLK Rise
Set-up before CLK Rise
Description
[10, 11]
Min.
2.0
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
117 MHz
Max.
Min.
2.0
2.0
2.0
2.0
2.0
2.0
0.5
0.5
0.5
0.5
0.5
0.5
100 MHz
CY7C1214F
Max.
Page 9 of 15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns