AD9775EB AD [Analog Devices], AD9775EB Datasheet - Page 39

AD9775EB

Manufacturer Part Number

AD9775EB

Description

14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter

Manufacturer

AD [Analog Devices]

Datasheet

1.AD9775EB.pdf (48 pages)

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Figure 55. Test Configuration for AD9775 in Two Port Mode with PLL Enabled, Signal Generator

Frequency = Input Data Rate, DAC Output Data Rate = Signal Generator Frequency

Figure 56. Test Configuration for AD9775 in One Port Mode with PLL Enabled, Signal Generator

Frequency = One-Half Interleaved Input Data Rate, ONEPORTCLK = Interleaved Input Data Rate, DAC Output

Data Rate = Signal Generator Frequency

INPUT CLOCK

AWG2021

DG2020

JUMPER CONFIGURATION FOR TWO PORT MODE PLL ON

JP12 –

JP24 –

JP25 –

JP26 –

JP27 –

JP31 –

JP32 –

JP33 –

DG2020

JP12 –

JP24 –

JP25 –

JP26 –

JP27 –

JP31 –

JP32 –

JP33 –

JUMPER CONFIGURATION FOR TWO PORT MODE PLL ON

JP1 –

JP2 –

JP3 –

JP5 –

JP6 –

JP1 –

JP2 –

JP3 –

JP5 –

JP6 –

SOLDERED/IN

LECROY

PULSE

GENERATOR

LECROY

PULSE

GENERATOR

40-PIN RIBBON CABLE

Interpolation Rate

TRIG

INP

UNSOLDERED/OUT

–39–

DAC1, DB11–DB0

DAC2, DB11–DB0

ONEPORTCLK

DAC2, DB11–DB0

DAC1, DB11–DB0

DATACLK

AD9775

SIGNAL GENERATOR

AD9775

CLK+/CLK–

Interpolation Rate

AD9775

AD9775EB AD [Analog Devices], AD9775EB Datasheet - Page 39

AD9775EB

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