KAD5512P-50_09 INTERSIL [Intersil Corporation], KAD5512P-50_09 Datasheet - Page 8

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KAD5512P-50_09

Manufacturer Part Number
KAD5512P-50_09
Description
12-Bit, 500MSPS A/D Converter
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
Pinout/Package Information
Pin Descriptions
NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection)
2-5, 13, 14, 17, 18, 28-31
1, 6, 12, 19, 24, 71
Exposed Paddle
26, 45, 55, 65
7, 8, 11, 72
27, 36, 56
20, 21
32, 33
34, 35
37, 38
39, 40
41, 42
43, 44
47, 48
49, 50
51, 52
53, 54
57, 58
59, 60
61, 62
63, 64
PIN #
9, 10
15
16
22
23
25
46
66
67
68
69
70
LVDS [LVCMOS] NAME
D10N, D10P [NC, D10]
CLKOUTN, CLKOUTP
D11N, D11P [NC, D11]
8
ORN, ORP [NC, OR]
D0N, D0P [NC, D0]
D1N, D1P [NC, D1]
D2N, D2P [NC, D2]
D3N, D3P [NC, D3]
D4N, D4P [NC, D4]
D5N, D5P [NC, D5]
D6N, D6P [NC, D6]
D7N, D7P [NC, D7]
D8N, D8P [NC, D8]
D9N, D9P [NC, D9]
[NC, CLKOUT]
CLKP, CLKN
VINN, VINP
OUTMODE
RESETN
OUTFMT
NAPSLP
CLKDIV
RLVDS
OVDD
OVSS
AVDD
AVSS
SCLK
AVSS
SDIO
DNC
VCM
SDO
CSB
Analog Ground
Analog Input Negative, Positive
Common Mode Output
Tri-Level Clock Divider Control
Clock Input True, Complement
Tri-Level Output Mode (LVDS, LVCMOS)
Tri-Level Power Control (Nap, Sleep modes)
Power On Reset (Active Low, see page 14 )
Output Ground
1.8V Output Supply
LVDS Bias Resistor (connect to OVSS with a 10kΩ, 1% resistor)
LVDS Clock Output Complement, True [NC, LVCMOS CLKOUT]
SPI Serial Data Output (4.7kΩ pull-up to OVDD is required)
SPI Chip Select (active low)
SPI Clock
SPI Serial Data Input/Output
Tri-Level Output Data Format (Two’s Comp., Gray Code, Offset Binary)
Analog Ground
1.8V Analog Supply
Do Not Connect
LVDS Bit 0 (LSB) Output Complement, True [NC, LVCMOS Bit 0]
LVDS Bit 1 Output Complement, True [NC, LVCMOS Bit 1]
LVDS Bit 2 Output Complement, True [NC, LVCMOS Bit 2]
LVDS Bit 3 Output Complement, True [NC, LVCMOS Bit 3]
LVDS Bit 4 Output Complement, True [NC, LVCMOS Bit 4]
LVDS Bit 5 Output Complement, True [NC, LVCMOS Bit 5]
LVDS Bit 6 Output Complement, True [NC, LVCMOS Bit 6]
LVDS Bit 7 Output Complement, True [NC, LVCMOS Bit 7]
LVDS Bit 8 Output Complement, True [NC, LVCMOS Bit 8]
LVDS Bit 9 Output Complement, True [NC, LVCMOS Bit 9]
LVDS Bit 10 Output Complement, True [NC, LVCMOS Bit 10]
LVDS Bit 11 (MSB) Output Complement, True [NC, LVCMOS Bit 11]
LVDS Over Range Complement, True [NC, LVCMOS Over Range]
KAD5512P-50
LVDS [LVCMOS] FUNCTION
January 16, 2009
FN6805.0

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