PIC17C752 MICROCHIP [Microchip Technology], PIC17C752 Datasheet - Page 129

• Manufacturer Part Number: PIC17C752
• Description: High-Performance 8-Bit CMOS EPROM Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

15.1.1
The master can initiate the data transfer at any time
because it controls the SCK. The master determines
when the slave (Processor 2, Figure 15-9) is to broad-
cast data by the software protocol.
In master mode the data is transmitted/received as
soon as the SSPBUF register is written to. If the SPI is
only going to receive, the SCK output could be disabled
(programmed as an input). The SSPSR register will
continue to shift in the signal present on the SDI pin at
the programmed clock rate. As each byte is received, it
will be loaded into the SSPBUF register as if a normal
received byte (interrupts and status bits appropriately
set). This could be useful in receiver applications as a
“line activity monitor” mode.
The clock polarity is selected by appropriately program-
ming bit CKP (SSPCON1<4>). This then would give
waveforms for SPI communication as shown in
Figure 15-8, Figure 15-11, and Figure 15-12 where the
FIGURE 15-8: SPI MODE TIMING (MASTER MODE)
1997 Microchip Technology Inc.
SCK
(CKP = 0
CKE = 1)
Write to
SSPBUF
SCK
(CKP = 0
CKE = 0)
SCK
(CKP = 1
CKE = 0)
SCK
(CKP = 1
CKE = 1)
SDO
(CKE = 0)
SDO
(CKE = 1)
SDI
(SMP = 0)
Input
Sample
(SMP = 0)
SDI
(SMP = 1)
Input
Sample
(SMP = 1)
SSPIF
SSPSR to
SSPBUF
MASTER MODE
bit7
bit7
bit7
bit7
bit6
bit6
bit5
bit5
Preliminary
bit4
bit4
MSB is transmitted first. In master mode, the SPI clock
rate (bit rate) is user programmable to be one of the fol-
lowing:
• F
• F
• F
• Timer2 output/2
This allows a maximum bit clock frequency (at 33 MHz)
of 8.25 MHz.
Figure 15-8 Shows the waveforms for master mode.
When CKE = 1, the SDO data is valid before there is a
clock edge on SCK. The change of the input sample is
shown based on the state of the SMP bit. The time
when the SSPBUF is loaded with the received data is
shown.
bit3
bit3
OSC
OSC
OSC
/4 (or T
/16 (or 4 • T
/64 (or 16 • T
bit2
bit2
CY
)
CY
bit1
bit1
CY
)
)
bit0
bit0
bit0
bit0
DS30264A-page 129
4 clock
modes