PIC17C752 MICROCHIP [Microchip Technology], PIC17C752 Datasheet - Page 41
![no-image](/images/no-image-200.jpg)
PIC17C752
Manufacturer Part Number
PIC17C752
Description
High-Performance 8-Bit CMOS EPROM Microcontrollers
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC17C752.pdf
(320 pages)
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7.1.2
When either microprocessor or extended microcontrol-
ler mode is selected, PORTC, PORTD and PORTE are
configured as the system bus. PORTC and PORTD are
the multiplexed address/data bus and PORTE<2:0> is
for the control signals. External components are
needed to demultiplex the address and data. This can
be done as shown in Figure 7-4. The waveforms of
address and data are shown in Figure 7-3. For com-
plete timings, please refer to the electrical specification
section.
FIGURE 7-3:
The system bus requires that there is no bus conflict
(minimal leakage), so the output value (address) will be
capacitively held at the desired value.
As the speed of the processor increases, external
EPROM memory with faster access time must be used.
Table 7-2 lists external memory speed requirements for
a given PIC17C75X device frequency.
FIGURE 7-4:
<15:0>
1997 Microchip Technology Inc.
ALE
WR
OE
AD
Note 1: Use of I/O pins is only required for paged memory.
'1'
Q1
Address out Data in
EXTERNAL MEMORY INTERFACE
2: This signal is unused for ROM and EPROM devices.
PIC17CXXX
Q2
Read cycle
AD15-AD8
AD7-AD0
Q3
EXTERNAL PROGRAM
MEMORY ACCESS
WAVEFORMS
TYPICAL EXTERNAL PROGRAM MEMORY CONNECTION DIAGRAM
I/O
ALE
WR
OE
(1)
Q4
Q1
Address out
Q2
Q3
Write cycle
Data out
Q4
AD15-AD0
Q1
373
373
Preliminary
A15-A0
In extended microcontroller mode, when the device is
executing out of internal memory, the control signals
will continue to be active. That is, they indicate the
action that is occurring in the internal memory. The
external memory access is ignored.
This following selection is for use with Microchip
EPROMs. For interfacing to other manufacturers mem-
ory, please refer to the electrical specifications of the
desired PIC17C75X device, as well as the desired
memory device to ensure compatibility.
TABLE 7-2:
PIC17C75X
Note 1: The access times for this requires the use of
Frequency
Oscillator
16 MHz
20 MHz
25 MHz
33 MHz
138
8 MHz
(1)
fast SRAMs.
D7-D0
CE
OE
Ax-A0
Instruction
Memory
Time (T
(MSB)
500 ns
250 ns
200 ns
160 ns
121 ns
Cycle
WR
EPROM MEMORY ACCESS
TIME ORDERING SUFFIX
(2)
CY
)
EPROM Suffix
PIC17C752
PIC17C756
DS30264A-page 41
-25
-15
-10
-70
(1)
Ax-A0
D7-D0
CE
OE
Memory
(LSB)
WR
(2)
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