PIC17C752 MICROCHIP [Microchip Technology], PIC17C752 Datasheet - Page 207

• Manufacturer Part Number: PIC17C752
• Description: High-Performance 8-Bit CMOS EPROM Microcontrollers
• Manufacturer: MICROCHIP [Microchip Technology]

RETFIE
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1997 Microchip Technology Inc.
After Interrupt
operation
Decode
PC
GLINTD =
Q1
No
=
operation
operation
Return from Interrupt
[ label ]
None
TOS
0
PCLATH is unchanged.
GLINTD
Return from Interrupt. Stack is POP’ed
and Top of Stack (TOS) is loaded in the
PC. Interrupts are enabled by clearing
the GLINTD bit. GLINTD is the global
interrupt disable bit (CPUSTA<4>).
1
2
RETFIE
0000
Q2
No
No
TOS
0
GLINTD;
(PC);
RETFIE
0000
operation
GLINTD
Clear
Q3
No
0000
from stack
operation
POP PC
Q4
No
0101
RETLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
operation
Decode
WREG
WREG
Q1
No
=
=
operation
Return Literal to WREG
[ label ]
0
k
PCLATH is unchanged
None
WREG is loaded with the eight bit literal
'k'. The program counter is loaded from
the top of the stack (the return address).
The high address latch (PCLATH)
remains unchanged.
1
2
TABLE
literal 'k'
Read
1011
Q2
No
CALL TABLE ; WREG contains table
:
ADDWF PC
RETLW k0
RETLW k1
:
:
RETLW kn
0x07
value of k7
k
(WREG); TOS
255
RETLW k
0110
operation
Process
;
;
;
; WREG = offset
; Begin table
;
; End of table
Data
Q3
No
DS30264A-page 207
offset value
WREG now has
table value
kkkk
(PC);
from stack,
operation
POP PC
Write to
WREG
Q4
No
kkkk