MPC106ARX66CE MOTOROLA [Motorola, Inc], MPC106ARX66CE Datasheet - Page 24

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MPC106ARX66CE

Manufacturer Part Number
MPC106ARX66CE
Description
PCI Bridge/Memory Controller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
condition may cause excessive power draw by the input receivers on the MPC106 or by other receivers in
the system. It is recommended that these signals be pulled up or restored in some manner by the system.
The 60x data bus input receivers on the MPC106 do not require pull-up resistors on the data bus signals
(DH[0–31], DL[0–31], and PAR[0–7]). However, other data bus receivers in the system may require
pull-up resistors on these signals.
In general, the 60x address and control signals are pulled up to 3.3 VDC and the PCI control signals are
pulled up to 5 VDC through weak (2–10 k ) resistors. Resistor values may need to be adjusted stronger to
reduce induced noise on specific board designs. Table 12 summarizes the pull-up/pull-down
recommendations for the MPC106.
1.8.5 Thermal Management Information
This section provides thermal management information for the C4/CBGA package. Proper thermal control
design is primarily dependent on the system-level design.
The use of C4 die on a CBGA interconnect technology offers significant reduction in both the signal delay
and the microelectronic packaging volume. Figure 14 shows the salient features of the C4/CBGA
interconnect technology. The C4 interconnection provides both the electrical and the mechanical
connections for the die to the ceramic substrate. After the C4 solder bump is reflowed, epoxy (encapsulant)
is under-filled between the die and the substrate. Under-fill material is commonly used on large high-power
die; however, this is not a requirement of the C4 technology. The package substrate is a multilayer-cofired
ceramic. The package-to-board interconnection is by an array of orthogonal 90/10 (lead/tin) solder balls on
1.27 mm pitch. During assembly of the C4/CBGA package to the board, the high-melt balls do not
collapse.
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address/transfer
60x bus control
PCI bus control
Cache control
Signal Type
Factory test
attributes
60x bus
JTAG
MPC106 PCI Bridge/Memory Controller Hardware Specifications
FLSHREQ, ISA_MASTER.
Table 12. Pull-Up/Pull-Down Recommendations
A[0–31], TT[0–4], TBST
DEVSEL, TRDY, STOP
TS, XATS, AACK
FRAME, IRDY
LSSD_MODE
SERR, PERR
WT, CI, GBL
Signals
ARTRY
HIT, TV
LOCK
TRST
REQ
ADS
BRn
TA
Pull up to 3.3 VDC
Pull up to 3.3 VDC
Pull up to 3.3 VDC
Pull up to 3.3 VDC or pull-down to GND depending on
programmed polarity
Typically pull up to 5 VDC
Note: For closed systems not requiring 5V power,
these may be pulled up to 3.3 VDC.
Pull down to GND (during normal system operation)
Pull up to 3.3 VDC
Pull-Up/Pull-Down

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