CY8C34_1105 CYPRESS [Cypress Semiconductor], CY8C34_1105 Datasheet - Page 104

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CY8C34_1105

Manufacturer Part Number
CY8C34_1105
Description
Programmable System-on-Chip (PSoC) DC to 50 MHz operation
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
11.7.5 External Memory Interface
Table 11-60. Asynchronous Read Cycle Specifications
Document Number: 001-53304 Rev. *L
Note
T
Tcel
Taddrv
Taddrh
Toel
Tdoesu
Tdoeh
Parameter
45. Limited by GPIO output frequency, see
EMIF clock period
EM_CEn low time
EM_CEn low to EM_Addr valid
Address hold time after EM_Wen high
EM_OEn low time
Data to EM_OEn high setup time
Data hold time after EM_OEn high
EM_ WEn
EM_ Addr
EM_ Data
EM_ CEn
EM_ OEn
Description
[45]
Table 11-10
Taddrv
Figure 11-62. Asynchronous Read Cycle Timing
on page 75.
Tcel
Vdda ≥ 3.3 V
Toel
Address
Tdoesu
Conditions
Data
PSoC
2T – 5
2T – 5
T + 15
30.3
Min
T
3
Tdoeh
®
3: CY8C34 Family
Typ
Taddrh
2T + 5
2T+ 5
Data Sheet
Max
5
Page 104 of 127
Units
nS
nS
nS
nS
nS
nS
nS

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