CY8C34_1105 CYPRESS [Cypress Semiconductor], CY8C34_1105 Datasheet - Page 110

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CY8C34_1105

Manufacturer Part Number
CY8C34_1105
Description
Programmable System-on-Chip (PSoC) DC to 50 MHz operation
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
11.8.5 SWD Interface
Table 11-70. SWD Interface AC Specifications
11.8.6 SWV Interface
Table 11-71. SWV Interface AC Specifications
Document Number: 001-53304 Rev. *L
f_SWDCK
T_SWDI_setup SWDIO input setup before SWDCK high T = 1/f_SWDCK max
T_SWDI_hold
T_SWDO_valid SWDCK high to SWDIO output
T_SWDO_hold SWDIO output hold after SWDCK low
Notes
51. Based on device characterization (Not production tested).
52. ff_SWDCK must also be no more than 1/3 CPU clock frequency.
Parameter
Parameter
(PSoC 3 reading on SWDIO)
(PSoC 3 writing to SWDIO)
SWDCLK frequency
SWDIO input hold after SWDCK high
SWV mode SWV bit rate
SWDCK
SWDIO
SWDIO
Description
Description
T_SWDI_setup
Figure 11-67. SWD Interface Timing
[51]
[51]
T_SWDI_hold
3.3 V ≤ V
1.71 V ≤ V
1.71 V ≤ V
SWD over USBIO pins
T = 1/f_SWDCK max
T = 1/f_SWDCK max
T = 1/f_SWDCK max
DDD
DDD
DDD
Conditions
Conditions
≤ 5 V
< 3.3 V
< 3.3 V,
T_SWDO_valid
(1/f_SWDCK)
PSoC
Min
Min
T/4
T/4
T/4
®
T_SWDO_hold
3: CY8C34 Family
Typ
Typ
Data Sheet
5.5
14
Page 110 of 127
Max
2T/5
7
Max
[52]
33
[52]
[52]
Units
Units
MHz
MHz
MHz
Mbit

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