CY8C34_1105 CYPRESS [Cypress Semiconductor], CY8C34_1105 Datasheet - Page 69

• Manufacturer Part Number: CY8C34_1105
• Description: Programmable System-on-Chip (PSoC) DC to 50 MHz operation
• Manufacturer: CYPRESS [Cypress Semiconductor]

Table 11-3. AC Specifications
Document Number: 001-53304 Rev. *L
Note
F
F
Svdd
T
T
T
T
24. Based on device characterization (Not production tested).
STARTUP
SLEEP
IO_INIT
CPU
BUSCLK
HIBERNATE
Parameter
CPU frequency
Bus frequency
V
Time from V
IPOR to I/O ports set to their reset
states
Time from V
PRES to CPU executing code at
reset vector
Wakeup from sleep mode –
Application of non-LVD interrupt to
beginning of execution of next CPU
instruction
Wakeup from hibernate mode –
Application of external interrupt to
beginning of execution of next CPU
instruction
DD
ramp rate
Description
DDD
DDD
[24]
/V
/V
DDA
DDA
/V
/V
1.71 V
5.5 V
3.3 V
0.5 V
CCD
CCD
0 V
/V
/V
DC
CCA
CCA
≥
≥
Figure 11-4. F
Valid Operating Region with SMP
1.71 V ≤ V
1.71 V ≤ V
–
–
V
V
mode (12 MHz typ.)
CCA
DDA
Valid Operating Region
/V
/V
CPU Frequency
CCD
DDD
1 MHz
DDD
DDD
, no PLL used, IMO boot
Conditions
= regulated from
CPU
≤ 5.5 V
≤ 5.5 V
vs. V
DD
10 MHz
50 MHz
PSoC
Min
DC
DC
–
–
–
–
–
®
3: CY8C34 Family
Typ
–
–
–
–
–
–
–
Data Sheet
50.01
50.01
Max
100
10
66
15
Page 69 of 127
1
Units
MHz
MHz
V/ns
µs
µs
µs
µs