CY8C34_1105 CYPRESS [Cypress Semiconductor], CY8C34_1105 Datasheet - Page 66

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CY8C34_1105

Manufacturer Part Number
CY8C34_1105
Description
Programmable System-on-Chip (PSoC) DC to 50 MHz operation
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
11.2 Device Level Specifications
Specifications are valid for –40 °C ≤ T
except where noted.
11.2.1 Device Level Specifications
Table 11-2. DC Specifications
Document Number: 001-53304 Rev. *L
V
V
V
V
V
V
V
I
Notes
Parameter
DD
19. The power supplies can be brought up in any sequence however once stable V
20. The V
21. The current consumption of additional peripherals that are implemented only in programmed logic blocks can be found in their respective data sheets, available in
DDA
DDA
DDD
DDD
DDIO
CCA
CCD
[21]
PSoC Creator, the integrated design environment. To estimate total current, find CPU current at frequency of interest and add peripheral currents for your particular
system from the device data sheet and component data sheets.
[20]
DDIO
supply voltage must be greater than the maximum analog voltage on the associated GPIO pins. Maximum analog voltage on GPIO pin ≤ V
Analog supply voltage and input to
analog core regulator
Analog supply voltage, analog
regulator bypassed
Digital supply voltage relative to V
Digital supply voltage, digital
regulator bypassed
I/O supply voltage relative to V
Direct analog core voltage input
(Analog regulator bypass)
Direct digital core voltage input
(Digital regulator bypass)
Active Mode, V
Bus clock off. Execute from CPU
instruction buffer. See
Program Memory”
V
clock enabled, ILO = 1 kHz, CPU
executing from flash and accessing
SRAM, all other blocks off, all I/Os
tied low.
DD
= 3.3 V, T = 25 °C, IMO and bus
Description
DD
on page 21.
= 1.71 V – 5.5 V
“Flash
A
≤ 85 °C and T
SSIO
SSD
Analog core regulator enabled
Analog core regulator disabled
Digital core regulator enabled
Digital core regulator disabled
Analog core regulator disabled
Digital core regulator disabled
CPU at 3 MHz
CPU at 6 MHz
CPU at 12 MHz
CPU at 24 MHz
CPU at 48 MHz
CPU at 3 MHz
CPU at 6 MHz
CPU at 12 MHz
CPU at 24 MHz
CPU at 48 MHz
J
≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
Conditions
DDA
must be greater than or equal to all other supplies.
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
T = –40 °C
T = 25 °C
T = 85 °C
PSoC
1.71
1.71
1.71
1.71
1.71
Min
1.8
1.8
®
3: CY8C34 Family
11.8
Typ
1.8
1.8
1.8
1.8
0.8
1.2
2.0
3.5
6.6
1.4
2.2
3.6
6.4
V
V
Data Sheet
DDA
DDA
Max
1.89
1.89
1.89
1.89
5.5
Page 66 of 127
[19]
[19]
DDIO
Units
≤ V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
DDA
.

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