PIC18F2220 MICROCHIP [Microchip Technology], PIC18F2220 Datasheet - Page 291

• Manufacturer Part Number: PIC18F2220
• Description: 28/40/44-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

RRNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
 2003 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
REG
W
REG
W
REG
Q1
=
=
=
=
=
=
register ‘f’
Rotate Right f (no carry)
[ label ]
0
d
a
(f<n>)
(f<0>)
N, Z
The contents of register ‘f’ are
rotated one bit to the right. If ‘d’ is
‘0’, the result is placed in W. If ‘d’ is
‘1’, the result is placed back in reg-
ister ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ is ‘1’,
then the bank will be selected as
per the BSR value (default).
1
1
RRNCF
RRNCF
Read
0100
Q2
1101 0111
1110 1011
?
1101 0111
1110 1011
1101 0111
f
[0,1]
[0,1]
255
dest<n-1>,
dest<7>
REG, 1, 0
REG, W
RRNCF
00da
Process
Data
Q3
register f
ffff
f [,d [,a]]
destination
Write to
PIC18F2220/2320/4220/4320
Q4
ffff
SETF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
register ‘f’
Set f
[ label ] SETF
0
a
FFh
None
The contents of the specified regis-
ter are set to FFh. If ‘a’ is ‘0’, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ is ‘1’,
then the bank will be selected as
per the BSR value (default).
1
1
SETF
Read
0110
Q2
=
=
f
[0,1]
255
f
0x5A
0xFF
REG
100a
Process
Data
Q3
DS39599C-page 289
f [,a]
ffff
register ‘f’
Write
Q4
ffff