PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 208

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PIC18F2331-E/ML

Manufacturer Part Number
PIC18F2331-E/ML
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F2331/2431/4331/4431
REGISTER 19-2:
DS39616D-page 208
bit 3-0
Note 1:
2:
3:
In Master mode, the overflow bit is not set since each new reception (and transmission) is initiated by
writing to the SSPBUF register.
When enabled, these pins must be properly configured as inputs or outputs.
Bit combinations not specifically listed here are either reserved or implemented in I
SSPM<3:0>: Synchronous Serial Port Mode Select bits
0000 = SPI Master mode, Clock = F
0001 = SPI Master mode, Clock = F
0010 = SPI Master mode, Clock = F
0011 = SPI Master mode, Clock = TMR2 output/2
0100 = SPI Slave mode, Clock = SCK pin, SS pin control enabled
0101 = SPI Slave mode, Clock = SCK pin, SS pin control disabled, SS can be used as I/O pin
0110 = I
0111 = I
1011 = I
1110 = I
1111 = I
SSPCON: SYNCHRONOUS SERIAL PORT CONTROL REGISTER (CONTINUED)
2
2
2
2
2
C Slave mode, 7-bit address
C Slave mode, 10-bit address
C Firmware Controlled Master mode (slave Idle)
C Slave mode, 7-bit address with Start and Stop bit interrupts enabled
C Slave mode, 10-bit address with Start and Stop bit interrupts enabled
OSC
OSC
OSC
/4
/16
/64
(3)
 2010 Microchip Technology Inc.
2
C™ mode only.

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