PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 243

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PIC18F2331-E/ML

Manufacturer Part Number
PIC18F2331-E/ML
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
REGISTER 21-4:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4-0
Note 1:
ADRS1
R/W-0
The SSRC<4:0> bits can be set such that any of the triggers will start a conversion (e.g., SSRC<4:0> = 00101
will trigger the A/D conversion sequence when RC3/INT0 or Input Capture 1 event occurs).
ADRS<1:0>: A/D Result Buffer Depth Interrupt Select Control for Continuous Loop Mode bits
The ADRS bits are ignored in Single-Shot mode.
00 = Interrupt is generated when each word is written to the buffer
01 = Interrupt is generated when the 2nd and 4th words are written to the buffer
10 = Interrupt is generated when the 4th word is written to the buffer
11 = Unimplemented
Unimplemented: Read as ‘0’
SSRC<4:0>: A/D Trigger Source Select bits
00000 = All triggers disabled
xxxx1 = External interrupt RC3/INT0 starts A/D sequence
xxx1x = Timer5 starts A/D sequence
xx1xx = Input Capture 1 (IC1) starts A/D sequence
x1xxx = CCP2 compare match starts A/D sequence
1xxxx = Power Control PWM module rising edge starts A/D sequence
ADRS0
R/W-0
ADCON3: A/D CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
U-0
PIC18F2331/2431/4331/4431
SSRC4
R/W-0
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SSRC3
R/W-0
(1)
SSRC2
R/W-0
(1)
x = Bit is unknown
SSRC1
R/W-0
(1)
DS39616D-page 243
SSRC0
R/W-0
bit 0
(1)

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