PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 311

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PIC18F2331-E/ML

Manufacturer Part Number
PIC18F2331-E/ML
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
NEGF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2010 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ‘f’
Negate f
[ label ]
0  f  255
a  [0,1]
( f ) + 1  f
N, OV, C, DC, Z
Location, ‘f’, is negated using two’s
complement. The result is placed in the
data memory location, ‘f’. If ‘a’
is ‘0’, the Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value.
1
1
NEGF
Read
0110
Q2
0011 1010 [0x3A]
1100 0110 [0xC6]
NEGF
REG, 1
110a
Process
Data
Q3
f [,a]
ffff
register ‘f’
PIC18F2331/2431/4331/4431
Write
Q4
ffff
NOP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
None.
Decode
Q1
operation
No Operation
[ label ]
None
No operation
None
No operation.
1
1
0000
1111
No
Q2
NOP
0000
xxxx
operation
No
Q3
DS39616D-page 311
0000
xxxx
operation
No
Q4
0000
xxxx

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