PIC18F2331-E/ML MICROCHIP [Microchip Technology], PIC18F2331-E/ML Datasheet - Page 272

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PIC18F2331-E/ML

Manufacturer Part Number
PIC18F2331-E/ML
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F2331/2431/4331/4431
REGISTER 23-11: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
REGISTER 23-12: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)
DS39616D-page 272
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5-0
Note 1:
U-0
U-0
2:
3:
2:
Unimplemented in PIC18F2331/4331 devices; maintain this bit set.
Refer to
Enabling the corresponding CPx bit is recommended to protect the block from external read operations.
Enabling the corresponding CPx bit is recommended to protect the block from external read operations.
Refer to
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 is not protected from table reads executed in other blocks
0 = Block 3 is protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 is not protected from table reads executed in other blocks
0 = Block 2 is protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 is not protected from table reads executed in other blocks
0 = Block 1 is protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 is not protected from table reads executed in other blocks
0 = Block 0 is protected from table reads executed in other blocks
Unimplemented: Read as ‘0’
EBTRB: Boot Block Table Read Protection bit
1 = Boot block is not protected from table reads executed in other blocks
0 = Boot block is protected from table reads executed in other blocks
Unimplemented: Read as ‘0’
EBTRB
R/P-1
U-0
Figure 23-5
Figure 23-5
(1,2)
P = Programmable bit
P = Programmable bit
for block boundary addresses.
for block boundary addresses.
U-0
U-0
(1,2,3)
(1,2,3)
(2,3)
(2,3)
U-0
U-0
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
U = Unchanged from programmed state
EBTR3
(1,2)
R/P-1
U-0
(1,2,3)
EBTR2
R/P-1
U-0
(1,2,3)
 2010 Microchip Technology Inc.
EBTR1
R/P-1
U-0
(2,3)
EBTR0
R/P-1
U-0
(2,3)
bit 0
bit 0

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