PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 378

no-image

PIC18F2480

Manufacturer Part Number
PIC18F2480
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2480-E/ML
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F2480-E/SO
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC18F2480-I/SO
Manufacturer:
Microchi
Quantity:
9 999
Part Number:
PIC18F2480-I/SO
Manufacturer:
MIC
Quantity:
20 000
Part Number:
PIC18F2480-I/SO
0
Part Number:
PIC18F2480-I/SP
Manufacturer:
TDK
Quantity:
64
Part Number:
PIC18F2480-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2480/2580/4480/4580
BZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39637A-page 376
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Zero
If Zero
No
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Zero
BZ
-128
if Zero bit is ‘1’
(PC) + 2 + 2n
None
If the Zero bit is ‘1’, then the program
will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
‘n’
‘n’
Q2
Q2
=
=
=
=
=
n
n
address (HERE)
1;
address (Jump)
0;
address (HERE + 2)
127
0000
operation
BZ
Process
Process
Data
Data
No
PC
Q3
Q3
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn
Preliminary
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
operation
Decode
PC
PC
TOS
WS
BSRS
STATUSS=
No
Q1
Read literal
=
=
=
=
=
operation
‘k’<7:0>,
Subroutine Call
CALL k {,s}
0
s
(PC) + 4
k
if s = 1
(W)
(Status)
(BSR)
None
Subroutine call of entire 2-Mbyte
memory range. First, return address
(PC + 4) is pushed onto the return
stack. If ‘s’ = 1, the W, Status and BSR
registers are also pushed into their
respective shadow registers, WS,
STATUSS and BSRS. If ‘s’ = 0, no
update occurs (default). Then, the
20-bit value ‘k’ is loaded into PC<20:1>.
CALL
2
2
HERE
1110
1111
No
Q2
address (HERE)
address (THERE)
address (HERE + 4)
W
BSR
Status
k
[0,1]
PC<20:1>,
 2004 Microchip Technology Inc.
is a two-cycle instruction.
WS,
1048575
BSRS
STATUSS,
k
TOS,
110s
Push PC to
CALL
19
operation
kkk
stack
No
Q3
THERE,1
k
kkkk
7
kkk
Read literal
Write to PC
‘k’<19:8>,
operation
No
Q4
kkkk
kkkk
0
8

Related parts for PIC18F2480