HD6417606 RENESAS [Renesas Technology Corp], HD6417606 Datasheet - Page 98

• Manufacturer Part Number: HD6417606
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 5 Exception Handling
5.4
5.4.1
Table 5.7 shows the sources that start the interrupt exception handling. They are NMI, user break,
H-UDI, IRQ and on-chip peripheral modules.
Table 5.7
All interrupt sources are given different vector numbers and vector table address offsets. For
details on vector numbers and vector table address offsets, see table 6.2 in section 6, Interrupt
Controller (INTC).
5.4.2
The interrupt priority is predetermined. When multiple interrupts occur simultaneously
(overlapped interruptions), the interrupt controller (INTC) determines their relative priorities and
starts the exception handling according to the results.
The priority of interrupts is expressed as priority levels 0 to 16, with priority 0 the lowest and
priority 16 the highest. The NMI interrupt has priority 16 and cannot be masked, so it is always
accepted. The priority level of the user break interrupt and H-UDI is 15. IRQ interrupt and on-chip
peripheral module interrupt priority levels can be set freely using the interrupt priority level setting
registers A to E (IPRA to IPRE) of the INTC as shown in table 5.8. The priority levels that can be
set are 0 to 15. Level 16 cannot be set. For details on IPRA to IPRE, see section 6.3.4, Interrupt
Priority Registers A to E (IPRA to IPRE).
Rev. 4.00 Sep. 13, 2007 Page 72 of 502
REJ09B0239-0400
Type
NMI
User break
H-UDI
IRQ
On-chip peripheral module
Interrupts
Interrupt Sources
Interrupt Priority
Interrupt Sources
Request Source
NMI pin (external input)
User break controller (UBC)
User debug interface (H-UDI)
IRQ0 to IRQ7 pins (external input)
Watchdog timer (WDT)
Compare match timer (CMT0 and CMT1)
Serial communication interface with FIFO
(SCIF0, SCIF1, and SCIF2)
Host interface (HIF)
1
1
2
2
Number of
Sources
1
1
8
12