CS8405A-IS CIRRUS [Cirrus Logic], CS8405A-IS Datasheet - Page 14

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CS8405A-IS

Manufacturer Part Number
CS8405A-IS
Description
96 kHz Digital Audio Interface Transmitter
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
stereo mode, and placing consecutive audio sam-
ples in the left and right positions in an incoming
48 kHz word rate data stream.
14
TCBL
In or Out
TCBL
In or Out
VLRCK
SDIN
Input
VLRCK
SDIN
Input
TXP(N)
Output
TXP(N)
Output
TXP(N)
Output
VCU
Input
U
Input
VLRCK duty cycle is 50%.
In stereo mode, VLRCK frequency = AES3 frame rate. In mono mode, ALRCK frequency = 2xAES3 frame rate.
If the serial audio input port is on slave mode and TCBL is an output, then VLRCK=ILRCK if SILRPOL=0 and
VLRCK= ILRCK if SILRPOL =1.
If the serial audio input port is in master mode and TCBL is an input, then VLRCK=ILRCK if SILRPOL=0 and
VLRCK= ILRCK if SILRPOL =1.
VLRCK is a virtual word clock, which may not exist, and is used to illustrate the CUV timing.
Tth
Tth
* Assume MMTLR = 0
Z
* Assume MMTLR = 1
Z
Z
Data [4]
Data [4]
Data [0]
Tsetup
Figure 7. AES3 Transmitter Timing for C, U, and V Pin Input Data
Data [1]*
VCU[0]
Data [0]*
Y
Thold
Data [5]
Data [5]
Data [1]
AES3 Transmitter in Mono mode
AES3 Transmitter in Stereo mode
VCU[1]
U[0]
Y
X
Y
Data [6]
Data [6]
Data [2]
Data [3]*
Data [2]*
VCU[2]
Y
Data [7]
Data [7]
Data [3]
VCU[3]
Tth > 3OMCK if TCBL is Input
Tth > 3OMCK if TCBL is Input
Tsetup => 7.5% AES3 frame time
Thold = 0
Tsetup => 15% AES3 frame time
Thold = 0
U[2]
X
X
X
Data [8]
Data [8]
Data [4]
Data [5]*
Data [4]*
CS8405A
VCU[4]
DS469F2

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