CS8405A-IS CIRRUS [Cirrus Logic], CS8405A-IS Datasheet - Page 25

• Manufacturer Part Number: CS8405A-IS
• Description: 96 kHz Digital Audio Interface Transmitter
• Manufacturer: CIRRUS [Cirrus Logic]

9. PIN DESCRIPTION - SOFTWARE MODE
DS469F2
VD+
VL+
DGND
DGND2
DGND3
DGND4
RST
H/S
TXN
TXP
OMCK
SDA / CDOUT
23
22
24
25
26
21
6
5
8
7
9
AD0 / CS
Digital Power ( Input ) - Digital core power supply. Typically +5.0 V.
Logic Power ( Input ) - Input/Output power supply. Typically +3.3 V or +5.0 V.
Ground ( Input ) - Ground for I/O and core logic.
Reset ( Input ) - When RST is low, the CS8405A enters a low power mode and all internal
states are reset. On initial power up, RST must be held low until the power supply is stable,
and all input clocks are stable in frequency and phase. This is particularly true in hardware
mode with multiple CS8405A devices, where synchronization between devices is important.
Hardware/Software Control Mode Select ( Input ) -Determines the method of controlling the
operation of the CS8405A, and the method of accessing Channel Status and User bit data. In
software mode, device control and CS and U data access is primarily through the control port,
using a microcontroller. Hardware mode provides an alternate mode of operation, and access
to CS and U data is provided by dedicated pins. This pin should be permanently tied to VL+
or DGND.
Differential Line Drivers ( Output ) - These pins transmit biphase encoded data. The drivers
are pulled low while the CS8405A is in the reset state.
Master Clock ( Input ) - The frequency must be 256x, 384x, or 512x the sample rate.
DGND2
DGND4
DGND3
ILRCK
ISCLK
SDIN
RXP
AD2
VD+
RST
NC1
NC2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SCL / CCLK
AD1 / CDIN
TXP
TXN
H/S
VL+
DGND
OMCK
U
INT
NC5
NC4
NC3
TCBL
CS8405A
25