CY14E256LA-ZS25XI CYPRESS [Cypress Semiconductor], CY14E256LA-ZS25XI Datasheet - Page 13

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CY14E256LA-ZS25XI

Manufacturer Part Number
CY14E256LA-ZS25XI
Description
256 Kbit (32K x 8) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Software Controlled STORE/RECALL Cycle
Switching Waveforms
Document Number: 001-54952 Rev. *B
t
t
t
t
t
Notes
RC
SA
CW
HA
RECALL
22. The software sequence is clocked with CE controlled or OE controlled reads.
23. The six consecutive addresses must be read in the order listed in
24. DQ output data at the sixth read may be invalid since the output is disabled at t
Parameters
HSB (STORE only)
[22, 23]
DQ (DATA)
DQ (DATA)
Address
Address
OE
CE
RWI
STORE/RECALL Initiation Cycle Time
Address Setup Time
Clock Pulse Width
Address Hold Time
RECALL Duration
OE
CE
t
SA
t
SA
Figure 9. CE and OE Controlled Software STORE/RECALL Cycle
t
t
LZCE
LZCE
t
t
SA
SA
Address #1
Address #1
t
t
Figure 10. Autostore Enable / Disable Cycle
RC
t
CW
RC
Description
t
CW
t
HZCE
t
t
Table 2
HA
HA
t
HZCE
t
t
HA
HA
on page 5. WE must be HIGH during all six consecutive cycles.
DELAY
t
DELAY
time.
Address #6
Note
t
RC
t
CW
24
Min
25
20
t
Address #6
0
0
HA
Note
25 ns
High Impedance
t
RC
t
CW
24
t
STORE
t
HA
Max
200
t
t
HA
DELAY
/t
t
RECALL
SS
[23]
t
HA
Min
45
30
0
0
45 ns
CY14E256LA
Max
200
t
HHHD
t
LZHSB
Page 13
Unit
ns
ns
ns
ns
µs
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