CY14E256LA-ZS25XI CYPRESS [Cypress Semiconductor], CY14E256LA-ZS25XI Datasheet - Page 14

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CY14E256LA-ZS25XI

Manufacturer Part Number
CY14E256LA-ZS25XI
Description
256 Kbit (32K x 8) nvSRAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Document Number: 001-54952 Rev. *B
Hardware STORE Cycle
Switching Waveforms
t
t
t
Notes
DHSB
PHSB
SS
25. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
26. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.
[25, 26]
DQ (Data Out)
Parameters
HSB (OUT)
Address
HSB (OUT)
Write latch not set
Write latch set
HSB (IN)
HSB (IN)
V
CE
CC
RWI
RWI
Address #1
t
SA
HSB To Output Active Time when write latch not set
Hardware STORE Pulse Width
Soft Sequence Processing Time
t
DELAY
Soft Sequence
t
t
PHSB
DELAY
t
Command
PHSB
Figure 12. Soft Sequence Processing
Figure 11. Hardware STORE Cycle
Address #6
t
DHSB
t
CW
Description
t
SS
t
STORE
t
DHSB
Address #1
Soft Sequence
100kOhm resistor,
SRAM is disabled as long as HSB (IN) is driven low.
HSB pin is driven high to V
HSB driver is disabled
Command
[18]
[25, 26]
Address #6
t
CW
t
LZHSB
t
HHHD
t
CC
SS
Min
CY14E256LA
15
only by Internal
CY14E256LA
Max
100
25
Page 14
Unit
ns
ns
μs
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