SE97BTP NXP [NXP Semiconductors], SE97BTP Datasheet - Page 18
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SE97BTP
Manufacturer Part Number
SE97BTP
Description
DDR memory module temp sensor with integrated SPD
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SE97BTP.pdf
(53 pages)
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NXP Semiconductors
SE97B_1
Product data sheet
Fig 13. Software Write Protect (write)
Fig 14. Software Write Protect (read)
(1) Refer to
(1) Refer to
SDA
SDA
X = Don’t Care
X = Don’t Care
7.10.2.1 Permanent Write Protection (PWP)
START condition
START condition
S
S
Table 7
Table 8
0
0
slave address (memory)
slave address (memory)
1
1
Up to eight memory devices can be connected on a single I
3-bit on the hardware selectable address (A2, A1, A0) inputs. The device only responds
when the 4-bit fixed and hardware selectable bits are matched. The 8th bit is the
read/write bit. This bit is set to 1 or 0 for read and write protection, respectively.
The corresponding device acknowledges during the ninth bit time when there is a match
on the 7-bit address.
The device does not acknowledge when there is no match on the 7-bit address or when
the device is already in permanent write protection mode and is programmed with any
write protection instructions (i.e., PWP, RWP, CWP).
If the software write-protection has been set with the PWP instruction, the first 128 bytes
of the memory are permanently write-protected. This write-protection cannot be cleared
by any instruction, or by power-cycling the device. Also, once the PWP instruction has
been successfully executed, the device no longer acknowledges any instruction (with 4-bit
fixed address of 0110b) to access the write-protection settings.
regarding the exact state of the acknowledge bit.
regarding the exact state of the acknowledge bit.
1
1
0
0
A2 A1 A0
A2 A1 A0
R/W acknowledge
R/W acknowledge
0
1
A
from slave
A
from slave
Rev. 01 — 27 January 2010
X
X
X
X
dummy byte address
dummy byte address
X
X
(1)
(1)
DDR memory module temp sensor with integrated SPD
X
X
X
X
no acknowledge
acknowledge
X
X
from slave
X
X
from slave
X
X
(1)
(1)
A
A
X
X
X
X
X
X
dummy data
dummy data
2
X
X
C-bus. Each one is given a
X
X
no acknowledge
acknowledge
X
X
STOP condition
STOP condition
X
from slave
X
from slave
© NXP B.V. 2010. All rights reserved.
X
X
002aab356
002aac644
(1)
(1)
A
A
SE97B
P
P
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