SE97BTP NXP [NXP Semiconductors], SE97BTP Datasheet - Page 35
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SE97BTP
Manufacturer Part Number
SE97BTP
Description
DDR memory module temp sensor with integrated SPD
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.SE97BTP.pdf
(53 pages)
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9. Application design-in information
SE97B_1
Product data sheet
Fig 20. SE97B interfacing with 1.0 V host controller
0.1 μF
A2
A0
A1
In a typical application, the SE97B behaves as a slave device and interfaces to a bus
master (or host) via the SCL and SDA lines. The EVENT output is monitored by the host,
and asserts when the temperature reading exceeds the programmed values in the alarm
registers. The A0, A1 and A2 pins are directly connected to V
resistors. The SDA and SCL serial interface pins are open-drain I/Os that require pull-up
resistors, and are able to sink a maximum of 3 mA with a voltage drop less than 0.4 V.
Typical pull-up values for SCL and SDA are 10 kΩ, but the resistor values can be changed
in order to meet the rise time requirement if the capacitance load is too large due to
routing, connectors, or multiple components sharing the same bus.
SE97B
Fig 19. Typical application showing SE97B interfacing with 3.3 V host
V
V
DD
SS
EVENT
3.3 V
SCL
SDA
10 kΩ
10 kΩ
Rev. 01 — 27 January 2010
slave
A2
A0
A1
mother board
SE97B
V
V
DD
SS
DDR memory module temp sensor with integrated SPD
0.1 μF
B2
B1
V
CC(B)
PCA9509
3.3 V
V
CC(A)
EVENT
EN
A2
A1
SDA
SCL
10 kΩ
(3×)
10 kΩ
10 kΩ
master
EVENT
CONTROLLER
DD
SCL
SDA
or V
HOST
0.1 μF
CONTROLLER
002aae313
SS
1.0 V ± 5 %
HOST
without any pull-up
© NXP B.V. 2010. All rights reserved.
002aae314
SE97B
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