MC908QL4 FREESCALE [Freescale Semiconductor, Inc], MC908QL4 Datasheet - Page 113

• Manufacturer Part Number: MC908QL4
• Description: M68HC08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

When DDRAx is a 1, reading PTA reads the PTAx data latch. When DDRAx is a 0, reading PTA reads
the logic level on the PTAx pin. The data latch can always be written, regardless of the state of its data
direction bit.
12.3.3 Port A Input Pullup/Down Enable Register
The port A input pullup/down enable register (PTAPUE) contains a software configurable pullup/down
device for each of the port A pins. Each bit is individually configurable and requires the corresponding
data direction register, DDRAx, to be configured as input. Each pullup/down device is automatically and
dynamically disabled when its corresponding DDRAx bit is configured as output. The pull device polarity
is defined by the KBIPR register, see
OSC2EN
Freescale Semiconductor
This read/write bit configures the OSC2 pin function when internal oscillator or RC oscillator option is
selected. This bit has no effect for the XTAL or external oscillator options.
1 = OSC2 pin outputs the internal or RC oscillator clock (BUSCLKX4)
0 = OSC2 pin configured for PTA4 I/O, having all the interrupt and pullup/down functions
READ DDRA
WRITE DDRA
WRITE PTA
READ PTA
— Enable PTA4 on OSC2 Pin
Reset:
Read:
Write:
Figure 12-4. Port A Input Pullup/Down Enable Register (PTAPUE)
OSC2EN
Bit 7
RESET
0
= Unimplemented
6
0
Figure 12-3
Figure 12-3. Port A I/O Circuit
MC68HC908QL4 Data Sheet, Rev. 7
DDRAx
9.8.3 Keyboard Interrupt Polarity Register
PTAPUE5
PTAx
5
0
does not apply to PTA2
PTAPUE4
NOTE
4
0
PTAPUE3
3
0
PTAPUE2
PTAPUEx
2
0
KBIPx
PTAPUE1
1
0
(KBIPR).
PTAPUE0
Bit 0
0
R
PULL
Port A
PTAx
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