M30280F6HP RENESAS [Renesas Technology Corp], M30280F6HP Datasheet - Page 242

• Manufacturer Part Number: M30280F6HP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
• Manufacturer: RENESAS [Renesas Technology Corp]

M
R
R
e
E
1
. v
Figure 15.5 TB2SC Register
J
6
0
C
2
9
0 .
2 /
B
0
0
Timer B2 Special Mode Register
8
b7
NOTES:
0
4
G
J
0 0
b6
1. Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enabled).
2. If the INV11 bit is "0" (three-phase mode 0) or the INV06 bit is "1" (triangular wave modulation mode), set this
3. When setting the IVPCR1 bit to "1" (three-phase output forcible cutoff by SD pin input enabled), set the PD8_5
4. Associated pins are U(P8
5. When this bit is used in delayed trigger mode 0, set the TB0EN and TB1EN bits to "1" (A/D trigger mode).
6. When setting the TB2SEL bit to "1" (underflow of TB2 interrupt generation frequency setting counter[ICTB2]),
7. Refer to "17.6 Digital Debounce Function" for the SD input
7
a
o r
0 -
. n
bit to "0" (Timer B2 underflow).
bit to "0" (= input mode).
to the SD pin and set the IVPCR1 bit to 0 after forcible cutoff, pins U, U, V, V, W, and W are exit from the high-
impedance state. If a low-level (“L”) signal is applied to the SD pin, three-phase motor control timer output will
be disabled (INV03=0). At this time, when the IVPCR1 bit is 0, pins U, U, V, V, W, and W become
programmable I/O ports. When the IVPCR1 bit is set to 1, pins U, U, V, V, W, and W are placed in a high-
impedance state regardless of which function of those pins is used.
set the INV02 bit to "1" (three-phase motor control timer function).
u
b5
2
3
p
0
, 1
0
b4
(
M
2
0
b3
1
0
6
7
C
b2
2 /
page 222
b1
, 8
b0
M
1
Bit Symbol
6
PWCOM
IVPCR1
TB2SEL
TB0EN
C
TB1EN
(b6-b5)
0
(b7)
), U(P8
f o
2 /
Symbol
TB2SC
8
3
) B
8
5
1
), V(P7
Three-phase output port
SD control bit 1
Timer B0 operation mode
select bit
Timer B1 operation mode
select bit
Trigger select bit
Timer B2 reload timing
switch bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”
Reserved bit
(1)
Address
039E
2
), V(P7
Bit Name
(2)
16
3
), W(P7
(3, 4, 7)
(6)
4
), W(P7
0 : TB2 interrupt
1 : Underflow of TB2 interrupt generation
0 : Timer B2 underflow
1 : Timer A output at odd-numbered
Set to "0"
0 : Three-phase output forcible cutoff
1 : Three-phase output forcible cutoff
0 : Other than A/D trigger mode
1 : A/D trigger mode
0 : Other than A/D trigger mode
1 : A/D trigger mode
X0000000
After Reset
frequency setting counter [ICTB2]
by SD pin input (high impedance)
disabled
by SD pin input (high impedance)
enabled
5
). When a high-level ("H") signal is applied
2
Function
(5)
(5)
15. A/D Converter
RW
RW
RW
RW
RW
RW
RW