M30280F6HP RENESAS [Renesas Technology Corp], M30280F6HP Datasheet - Page 357

• Manufacturer Part Number: M30280F6HP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/Tiny SERIES
• Manufacturer: RENESAS [Renesas Technology Corp]

M
R
R
1
e
E
Table 19.11 Timer A Input (Counter Input in Event Counter Mode)
Table 19.12 Timer A Input (Gating Input in Timer Mode)
Table 19.13 Timer A Input (External Trigger Input in One-shot Timer Mode)
Table 19.14 Timer A Input (External Trigger Input in Pulse Width Modulation Mode)
Table 19.15 Timer A Input (Counter Increment/decrement Input in Event Counter Mode)
Table 19.16 Timer A Input (Two-phase Pulse Input in Event Counter Mode)
Timing Requirements
(V
. v
6
J
t
0
C
t
t
c(TA)
w(TAL)
t
t
t
t
t
t
t
t
t
t
CC
w(TAH)
t
t
t
t
t
t
2
Symbol
c(TA)
w(TAH)
w(TAL)
c(TA)
w(UPH)
w(UPL)
h(T
9
w(TAH)
w(TAL)
w(TAH)
w(TAL)
c(UP)
su(UP-T
c(TA)
su(TA
su(TA
Symbol
Symbol
Symbol
Symbol
2 /
Symbol
0 .
B
IN-
8
0
0
= 5V, V
0
UP)
IN
OUT
G
4
J
-TA
IN
7
a
o r
-TA
)
0 -
. n
OUT
u
IN
2
p
3
0
)
)
SS
, 1
0
(
M
TAi
TAi
TAi
2
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
TAi
= 0V, at Topr = – 20 to 85
1
0
6
0
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
7
C
input cycle time
input HIGH pulse width
input LOW pulse width
input HIGH pulse width
input LOW pulse width
input HIGH pulse width
input LOW pulse width
input HIGH pulse width
input LOW pulse width
input cycle time
input setup time
input cycle time
input cycle time
2 /
input cycle time
input HIGH pulse width
input LOW pulse width
input setup time
input hold time
input setup time
page 337
, 8
M
1
6
C
2 /
f o
8
3
) B
8
5
Parameter
Parameter
Parameter
Parameter
Parameter
Parameter
o
C / – 40 to 85
o
C unless otherwise specified)
19. Electrical Characteristics
Min.
Min.
Min.
Min.
2000
1000
1000
Min.
Min.
100
400
200
200
200
100
100
100
100
400
400
800
200
200
Standard
40
40
Standard
Standard
Standard
Standard
Standard
Max.
V
Max.
Max.
Max.
Max.
Max.
CC
= 5V
Unit
ns
ns
ns
Unit
Unit
Unit
Unit
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns