LM3S101-CRN20-XNPP ETC1 [List of Unclassifed Manufacturers], LM3S101-CRN20-XNPP Datasheet - Page 32
LM3S101-CRN20-XNPP
Manufacturer Part Number
LM3S101-CRN20-XNPP
Description
Microcontroller
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S101-CRN20-XNPP.pdf
(284 pages)
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March 22, 2006
Table 4-1.
a. 0 is the default priority for all the settable priorities.
Table 4-2.
Exception Type
Usage Fault
-
SVCall
Debug Monitor
-
PendSV
SysTick
Interrupts
(Bit in Interrupt Registers)
Interrupt
8-17
3-4
18
19
20
21
22
0
1
2
5
6
7
Exception Types
Interrupts
Position
16 and
above
7-10
12
13
14
15
11
6
Description
GPIO Port A
GPIO Port B
GPIO Port C
Reserved
UART0
Reserved
SSI
Reserved
Watchdog timer
Timer0a
Timer0b
Timer1a
Timer1b
Priority
settable
settable
settable
settable
settable
settable
Preliminary
-
-
a
Description
Usage fault, such as undefined instruction executed
or illegal state transition attempt. This is
synchronous.
Reserved
System service call with SVC instruction. This is
synchronous.
Debug monitor (when not halting). This is
synchronous, but only active when enabled. It does
not activate if lower priority than the current
activation.
Reserved
Pendable request for system service. This is
asynchronous and only pended by software.
System tick timer has fired. This is asynchronous.
Asserted from outside the ARM Cortex-M3 core and
fed through the NVIC (prioritized). These are all
asynchronous. Table 4-2 lists the interrupts on the
LM3S101 controller.
LM3S101 Data Sheet
32
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