LM3S101-CRN20-XNPP ETC1 [List of Unclassifed Manufacturers], LM3S101-CRN20-XNPP Datasheet - Page 72
LM3S101-CRN20-XNPP
Manufacturer Part Number
LM3S101-CRN20-XNPP
Description
Microcontroller
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S101-CRN20-XNPP.pdf
(284 pages)
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March 22, 2006
Oscillator-Related Bits
Bit/Field
9:6
5:4
1:0
10
3
2
Table 6-3.
MOSCVER
BOSCVER
OSCSRC
reserved
PLLVER
Name
XTAL
(XTAL Binary Value)
Crystal Number
0000-0011
Default Crystal Field Values and PLL Programming
0100
0101
0110
1000
1001
0111
Type
R/W
R/W
R/W
R/W
R/W
RO
Reset
reserved
3.579545 MHz
3.6864 MHz
4 MHz
4.096 MHz
4.9152 MHz
5 MHz
0xB
0x0
0x0
0x0
0x0
0x0
Preliminary
Crystal Frequency (MHz)
Description
PLL Verification
This bit controls the PLL verification timer function. If set,
the verification timer is enabled and an interrupt is
generated if the PLL becomes inoperative. Otherwise, the
verification timer is not enabled.
This field specifies the crystal value attached to the main
oscillator. The encoding for this field is provided in Table 6-3
on page 72.
Picks among the four input sources for the OSC leg. The
values are:
This bit controls the boot oscillator verification timer
function. If set, the verification timer is enabled and an
interrupt is generated if the timer becomes inoperative.
Otherwise, the verification timer is not enabled.
This bit controls the main oscillator verification timer
function. If set, the verification timer is enabled and an
interrupt is generated if the timer becomes inoperative.
Otherwise, the verification timer is not enabled.
Reserved bits return an indeterminate value, and should
never be changed.
Value
00
01
10
11
Input Source
Main oscillator
Boot oscillator
Boot oscillator / 4 (this is necessary if used
as input to PLL)
reserved
LM3S101 Data Sheet
72
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