LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 115
LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
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Software Reset Control 0 (SRCR0)
Base 0x400F.E000
Offset 0x040
Type R/W, reset 0x00000000
June 04, 2007
Reset
Reset
Type
Type
Bit/Field
31:26
23:21
19:17
15:7
5:4
2:0
25
24
20
16
6
3
RO
RO
31
15
0
0
Register 27: Software Reset Control 0 (SRCR0), offset 0x040
Writes to this register are masked by the bits in the Device Capabilities 1 (DC1) register.
RO
RO
30
14
0
0
SARADC0
reserved
reserved
reserved
reserved
reserved
reserved
Name
CAN1
CAN0
PWM
WDT
HIB
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
reserved
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
R/W
R/W
0
0
RO
RO
RO
RO
RO
RO
RO
RO
26
10
0
0
Reset
0
0
0
0
0
0
0
0
0
0
0
0
CAN1
R/W
RO
25
0
9
0
Preliminary
CAN0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for CAN unit 1.
Reset control for CAN unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for PWM module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for SAR ADC module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for the Hibernation module.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Reset control for Watchdog unit.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W
RO
24
0
8
0
RO
RO
23
0
7
0
reserved
R/W
HIB
RO
22
0
6
0
RO
RO
21
0
5
0
reserved
PWM
R/W
RO
20
0
4
0
LM3S2965 Microcontroller
WDT
R/W
RO
19
0
3
0
reserved
RO
RO
18
0
2
0
reserved
RO
RO
17
0
1
0
SARADC0
R/W
RO
16
0
0
0
115
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