LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 512
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LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
- Current page: 512 of 542
- Download datasheet (6Mb)
Signal Tables
512
Pin Name
CAN0Rx
CAN0Tx
CAN1Rx
CAN1Tx
CMOD0
CMOD1
Fault
CCP0
CCP1
CCP2
CCP3
CCP4
CCP5
GNDA
GNDA
C0+
C0-
C0o
C1+
C1-
C2+
C2-
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Pin Number
90
92
58
24
91
23
22
10
47
61
66
43
67
95
96
40
65
76
99
15
21
33
39
45
54
57
63
69
82
87
94
97
11
9
4
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
I
I
I
Buffer Type
Analog
Analog
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
Analog comparator 0 positive input
Analog comparator 0 negative input
Analog comparator 0 output
Analog comparator positive input
Analog comparator 1 negative input
Analog comparator positive input
Analog comparator 2 negative input
CAN module 0 receive
CAN module 0 transmit
CAN module 1 receive
CAN module 1 transmit
Capture/Compare/PWM 0
Capture/Compare/PWM 1
Capture/Compare/PWM 2
Capture/Compare/PWM 3
Capture/Compare/PWM 4
Capture/Compare/PWM 5
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
June 04, 2007
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