LM3S2965-IQN25-A0T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IQN25-A0T Datasheet - Page 507
LM3S2965-IQN25-A0T
Manufacturer Part Number
LM3S2965-IQN25-A0T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IQN25-A0T.pdf
(542 pages)
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21
June 04, 2007
Signal Tables
The following tables list the signals available for each pin. Functionality is enabled by software with
the GPIOAFSEL register.
Important:
Table 21-1 on page 507 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Table 21-2 on page 511 lists the signals in alphabetical order by signal name.
Table 21-3 on page 516 groups the signals by functionality, except for GPIOs. Table 21-4 on page
520 lists the GPIO pins and their alternate functionality.
Table 21-1. Signals by Pin Number
Pin Number
10
11
12
13
1
2
3
4
5
6
7
8
9
All multiplexed pins are GPIOs by default, with the exception of the five JTAG pins (PB7
and PC[3:0]) which default to the JTAG functionality.
Pin Name
CAN0Rx
CAN0Tx
ADC0
ADC1
VDDA
GNDA
ADC2
ADC3
U1Rx
U1Tx
LDO
VDD
GND
PD0
PD1
PD2
PD3
Preliminary
Pin Type
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
I
I
I
I
I
I
Buffer Type
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
Description
Analog-to-digital converter input 0.
Analog-to-digital converter input 1.
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Analog-to-digital converter input 2.
Analog-to-digital converter input 3.
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. When the
on-chip LDO is used to provide power to the
logic, the LDO pin must also be connected to
the VDD25 pins at the board level in addition
to the decoupling capacitor(s).
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
CAN module 0 receive
GPIO port D bit 0
CAN module 0 transmit
GPIO port D bit 1
GPIO port D bit 2
UART module 1 receive. When in IrDA mode,
this signal has IrDA modulation.
GPIO port D bit 3
UART module 1 transmit. When in IrDA mode,
this signal has IrDA modulation.
LM3S2965 Microcontroller
507
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