SPEAR-09-H022_06 STMICROELECTRONICS [STMicroelectronics], SPEAR-09-H022_06 Datasheet - Page 37

• Manufacturer Part Number: SPEAR-09-H022_06
• Description: SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

SPEAR-09-H022
10
10.1
Vectored interrupt controller
Overview
The Vector Interrupt Controller provides a software interface to interrupt system, in order to
determine the source that is requesting a service and where the service routing is loaded.
It supplies the starting address, or vector address, of the service routine corresponding to
the highest priority requesting interrupt source.
In an ARM system 2 level of interrupt are available:
Generally, you only use a single FIQ source at a time to provide a true low-latency interrupt.
This has the following benefits:
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The interrupt inputs must be level sensitive, active HIGH, and held asserted until the
interrupt service routine clears the interrupt. Edge-triggered interrupts are not compatible.
The interrupt inputs do not have to be synchronous to AHB clock.
The main features of Vectored Interrupt Controller are:
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Since 32 interrupts are supported, there are 32 interrupt input lines, coming from different
sources. They are selected by a bit position and the software controls every line to generate
software interrupts; it can generate 16 vectored interrupts. A vectored interrupt can generate
only an IRQ interrupt.
The interrupt priority is controlled by hardware and it is as follow:
1.
2.
3.
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You can execute the interrupt service routine directly without determining the source of
the interrupt
It reduces interrupt latency. You can use the banked registers available for FIQ
interrupts more efficiently, because you do not require a context save
Compliance to AMBA Specification Rev. 2.0
IRQ and FIQ interrupt generation
AHB mapped for faster interrupt
Hardware priority
Support for 32 standard interrupts
Support for 16 vectored interrupts
Software interrupt generation
Interrupt masking
Interrupt request status.
FIQ interrupt
Vectored IRQ interrupt. The higher priority is 0; the lower is 15
Non vectored IRQ interrupt
Fast Interrupt Request (FIQ) for low latency interrupt handling
Interrupt Request (IRQ) for standard interrupts
Vectored interrupt controller
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