SPEAR-09-H022_06 STMICROELECTRONICS [STMicroelectronics], SPEAR-09-H022_06 Datasheet - Page 53

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SPEAR-09-H022_06

Manufacturer Part Number
SPEAR-09-H022_06
Description
SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
SPEAR-09-H022
17
UART
UART provides a standard serial data communication with transmit and receive channels
that can operate concurrently to handle a full-duplex operation.
Two internal FIFO for transmitted and received data, deep 16 and wide 8 bits, are present;
these FIFO can be enabled or disabled through a register.
Interrupts are provided to control reception and transmission of serial data.
The clock for both transmit and receive channels is provided by an internal Baud-Rate
generator that divides the AHB Bus clock by any divisor value from 1 to 255. The output
clock frequency of baud generator is sixteen times the baud rate value.
The maximum speed achieved is 115 KBauds.
In SPEAr Head200 there are 3 UART's, APB Bus slaves.
UART
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