SPEAR-09-H022_06 STMICROELECTRONICS [STMicroelectronics], SPEAR-09-H022_06 Datasheet - Page 54

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SPEAR-09-H022_06

Manufacturer Part Number
SPEAR-09-H022_06
Description
SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
I
18
18.1
54/71
2
C controller
I
Overview
The controller serves as an interface between the APB Bus and the serial I
provides master functions, and controls all I
and timing. Supported Standard (100 KHz) and Fast (400 KHz) I
Figure 15. I
Main features are:
In addition to receiving and transmitting data, this interface converts it from serial to parallel
format and vice versa, using either an interrupt or a polled handshake. The interrupts can be
enabled or disabled by software.
The interface is connected to the I²C bus by a data pin (SDA) and by a clock pin (SCL). SDA
signal is synchronized by SCL signal.
2
C controller
APB
BUS
Parallel-bus APB / I2C protocol converter
Standard I
Master interface (only).
Detection of bus errors during transfers
Control of all I
2
C Controller block diagram
2
C mode (100 KHz) / Fast I
2
C bus-specific sequencing, protocol, arbitration and timing
Interface
APB
Register
2
2
Array
C mode (400 KHz)
C bus-specific sequencing, protocol, arbitration
Control
Control
2
SDA
SLC
C mode.
SPEAR-09-H022
2
C bus. It
BUS
I²C

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