OX16PCI954-TQC60-A OXFORD [Oxford Semiconductor], OX16PCI954-TQC60-A Datasheet - Page 58
![no-image](/images/no-image-200.jpg)
OX16PCI954-TQC60-A
Manufacturer Part Number
OX16PCI954-TQC60-A
Description
Integrated Quad UART and PCI interface
Manufacturer
OXFORD [Oxford Semiconductor]
Datasheet
1.OX16PCI954-TQC60-A.pdf
(72 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
OX16PCI954-TQC60-A1
Manufacturer:
AD
Quantity:
556
10.2.3 Zone2: Identification Registers
The Zone2 region of EEPROM contains the program value
for Vendor ID and Subsystem Vendor ID. The format of
Device Identification configuration WORDs are described in
Table 34.
10.2.4 Zone3: PCI Configuration Registers
The Zone3 region of EEPROM contains any changes
required to the PCI Configuration registers (with the
exception of Vendor ID and Subsystem Vendor ID which
are programmed in Zone2). This zone is divided into two
groups, each of which consists of a function header
WORD, and one or more configuration WORDs for that
function. The function header is described in Table 35.
Data Sheet Revision 1.3
Bits
14:8
Bits
14:3
OXFORD SEMICONDUCTOR LTD.
7:0
2:0
15
15
Table 35: Zone 3 data format (Function Header)
Description
‘0’ = There are no more Zone2 (Identification)
bytes to program. Move to the next available
zone or end EEPROM program if no more zones
are enabled in the Header.
to follow.
0x00 = Vendor ID bits [7:0].
0x01 = Vendor ID bits [15:8].
0x02 = Subsystem Vendor ID [7:0].
0x03 = Subsystem Vendor ID [15:8].
0x03 to 0x7F = Reserved.
8-bit value of the register to be programmed
Description
‘0’ = End of Zone 3.
‘1’ = Define this function header.
Reserved. Write zeros.
Function number for the following configuration
WORD(s).
‘000’ = Function0 (Internal UARTs)
‘001’ = Function1 (Local Bus / Parallel Port)
Other values = Reserved.
‘1’ = There is another Zone2 (Identification) byte
Table 34: Zone 2 data format
The subsequent WORDs for each function contain the
address offset and a byte of programming data for the PCI
Configuration Space belonging to the function number
selected by the proceeding Function-Header. The format of
configuration WORDs for the PCI Configuration Registers
are described below.
Table 37 shows which PCI Configuration registers are
writable from the EEPROM for each function.
Table 37: EEPROM-writable PCI configuration registers
Offset
Bits
14:8
7:0
0x0A
0x0B
0x2E
0x3D
0x02
0x03
0x06
0x06
0x06
0x09
0x2F
0x42
0x43
15
Description
‘0’ = This is the last configuration WORD in for
the selected function in the Function-Header.
‘1’ = There is another WORD to follow for this
function.
These seven bits define the byte-offset of the PCI
configuration register to be programmed. For
example the byte-offset of the Interrupt Pin
register is 0x3D. Offset values are tabulated in
section 6.2.
8-bit value of the register to be programmed
Table 36: Zone 3 data format (data)
Bits
7:0
7:0
3:0
7:5
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
4
Description
Device ID bits 7 to 0.
Device ID bits 15 to 8.
Must be ‘0000’.
Extended Capabilities.
Must be ‘000’.
Class Code bits 7 to 0.
Class Code bits 15 to 8.
Class Code bits 23 to 16.
Subsystem ID bits 7 to 0.
Subsystem ID bits 15 to 8.
Interrupt pin.
Power Management Capabilities
bits 7 to 0.
Power Management Capabilities
bits 15 to 8.
OX16PCI954
Page 58