DSM2150F5V STMicroelectronics, DSM2150F5V Datasheet - Page 23

• Manufacturer Part Number: DSM2150F5V
• Description: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
• Manufacturer: STMicroelectronics

Data Polling. Polling on the Data Polling Flag Bit
(DQ7) is a method of checking whether a Program
or Erase cycle is in progress or has completed.
Figure
When the DSP issues a Program instruction se-
quence, the embedded algorithm within the device
begins. The DSP then reads the location of the
byte/word to be programmed in Flash memory to
check status. For 16-bit operation, the status loca-
tion READ must be at an even address and D8-
D15 can be ignored. The Data Polling Flag Bit
(DQ7) of this location becomes the compliment of
Bit 7 of the original data byte/word to be pro-
grammed. The DSP continues to poll this location,
comparing the Data Polling Flag Bit (DQ7) and
monitoring the Error Flag Bit (DQ5). When the
Data Polling Flag Bit (DQ7) matches Bit 7 of the
original data, and the Error Flag Bit (DQ5) remains
’0,’ then the embedded algorithm is complete. If
the Error Flag Bit (DQ5) is ’1,’ the DSP should test
the Data Polling Flag Bit (DQ7) again since the
Data Polling Flag Bit (DQ7) may have changed si-
multaneously with the Error Flag Bit (DQ5) (see
Figure 5).
The Error Flag Bit (DQ5) is set if either an internal
time-out occurred while the embedded algorithm
attempted to program the byte/word or if the DSP
attempted to program a ’1’ to a bit that was not
erased (not erased is logic ’0’).
It is suggested (as with all Flash memories) to read
the location again after the embedded program-
ming algorithm has completed, to compare the
byte/word hat was written to the Flash memory
with the byte/word that was intended to be written.
When using the Data Polling method during an
Erase cycle, Figure
Data Polling Flag Bit (DQ7) is ’0’ until the Erase cy-
cle is complete. A ’1’ on the Error Flag Bit (DQ5)
5
shows the Data Polling algorithm.
5
still applies. However, the
indicates a time-out condition on the Erase cycle,
a ’0’ indicates no error. The DSP can read any lo-
cation (must be even address for 16-bit mode)
within the sector being erased to get the Data Poll-
ing Flag Bit (DQ7) and the Error Flag Bit (DQ5).
PSDsoft Express generates ANSI C code func-
tions which implement these Data Polling algo-
rithms.
Figure 5. Data Polling Flowchart
at VALID ADDRESS
NO
READ DQ5 & DQ7
READ DQ7
START
DATA
DATA
DQ7
DQ5
DQ7
FAIL
= 1
=
=
YES
NO
NO
YES
YES
DSM2150F5V
PASS
AI01369B
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