DSM2150F5V STMicroelectronics, DSM2150F5V Datasheet - Page 57

• Manufacturer Part Number: DSM2150F5V
• Description: DSM (Digital Signal Processor System Memory) for Analog Devices DSPs (3.3V Supply)
• Manufacturer: STMicroelectronics

Figure 28. Synchronous Clock Mode Timing – PLD
Table 23. CPLD MicroCell Synchronous Clock Mode Timing
Note: 1. Fast slew rate output available on Port C and Port F.
f
t
t
t
t
t
t
t
Symbol
MAX
S
H
CH
CL
CO
ARD
MIN
2. CLKIN (PD1) t
Maximum Frequency
External Feedback
Maximum Frequency
Internal Feedback (f
Maximum Frequency
Pipelined Data
Input Setup Time
Input Hold Time
Clock High Time
Clock Low Time
Clock to Output Delay
CPLD Array Delay
Minimum Clock Period
Parameter
CLCL
REGISTERED
= t
OUTPUT
CLKIN
CH
INPUT
+ t
CNT
CL
.
2
)
Any MicroCell
1/(t
Conditions
Clock Input
Clock Input
Clock Input
1/(t
1/(t
t
S
CH
+t
CH
S
t CH
+t
+t
CO
+t
CL
CO
–10)
CL
)
)
Min
23
14
14
28
t CL
0
t S
-12
t H
Max
20.4
25.6
35.7
26
27
t CO
Add 4
Add 4
Aloc
PT
Add 20
Turbo
Off
DSM2150F5V
Rate
Sub 6
Slew
1
MHz
MHz
MHz
Unit
57/73
ns
ns
ns
ns
ns
ns
ns