XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 37

• Manufacturer Part Number: XC68HC705JB3
• Description: MICROCONTROLLER
• Manufacturer: Motorola

4.5.4 Timer1 Interrupt (TIMER1)
4.5.5 USB Interrupt (USB)
4.5.6 MFT Interrupt (MFT)
MC68HC05JB3
REV 1
The BIH and BIL instructions will only apply to the level on the IRQ pin itself, and
not to the output of the logic OR function with the PA0 to PA3 pins. The state of the
individual Port A pins can be checked by reading the appropriate Port A pins as
inputs.
If enabled, the PA0 to PA3 pins will cause an IRQ interrupt only when the
corresponding pin is configured as input.
The TIMER1 interrupt is generated by the 16-bit timer when either an overflow or
an input capture or output compare has occurred as described in the section on
16-bit timer. The interrupt flags and enable bits for the Timer1 interrupts are
located in the Timer1 Control & Status Register (TSR) located at $0012, $0013.
The I-bit in the CCR must be clear in order for the TIMER1 interrupt to be enabled.
Either of these three interrupts will vector to the same interrupt service routine
located at the address specified by the contents of memory locations $1FF6 and
$1FF7.
The USB interrupt is generated by the USB module as described in the section on
Universal Serial Bus. The interrupt enable bits for the USB interrupt are located at
bit3-bit2 of UIR0 register and bit3-bit2 of UIR1 register. Also Once the device goes
into Suspend Mode, any bus activities will cause the USB to generate an interrupt
to CPU to come out from the Suspend mode. The I-bit in the CCR must be clear in
order for the USB interrupt to be enabled. Either of these two interrupts will vector
to the same interrupt service routine located at the address specified by the con-
tents of memory locations $1FF8 and $1FF9.
The MFT interrupt is generated by the MFT module as described in the section on
Multi-function Timer. These interrupts will vector to the same interrupt service rou-
tine located at the address specified by the contents of memory locations $1FF4
and $1FF5.
November 5, 1998
INTERRUPTS
NOTE
NOTE
GENERAL RELEASE SPECIFICATION
MOTOROLA
4-7