XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 60

• Manufacturer Part Number: XC68HC705JB3
• Description: MICROCONTROLLER
• Manufacturer: Motorola

GENERAL RELEASE SPECIFICATION
9.2
MOTOROLA
9-4
ALTERNATE COUNTER REGISTERS (ACRH, ACRL)
The functional block diagram of the 16-bit free-running timer counter and alternate
counter registers is shown in Figure 9-4. The alternate counter registers behave
the same as the timer registers, except that any reads of the alternate counter will
not have any effect on the TOF flag bit and Timer interrupts. The alternate counter
registers include a transparent buffer latch on the LSB of the 16-bit timer counter.
The alternate counter registers (ACRH, ACRL) shown in Figure 9-5 are read-only
locations which contain the current high and low bytes of the 16-bit free-running
counter. Writing to the alternate counter registers has no effect. Reset of the
device presets the timer counter to $FFFC.
The ACRL latch is a transparent read of the LSB until the a read of the ACRH
takes place. A read of the ACRH latches the LSB into the ACRL location until the
ACRL is again read. The latched value remains fixed even if multiple reads of the
ACRH take place before the next read of the ACRL. Therefore, when reading the
MSB of the timer at ACRH the LSB of the timer at ACRL must also be read to
complete the read sequence.
During power-on-reset (POR), the counter is initialized to $FFFC and begins
counting after the oscillator start-up delay. Because the counter is sixteen bits and
preceded by a fixed divide-by-four prescaler, the value in the counter repeats
every 262,144 internal bus clock cycles (524,288 oscillator cycles).
Reading the ACRH and ACRL in any order or any number of times does not have
any effect on the 16-bit free-running counter or the TOF flag bit.
ACRH
$001A
ACRL
$001B
RESET
READ
ACRH
reset:
reset:
W
W
R
R
($FFFC)
Figure 9-5. Alternate Counter Registers (ACRH, ACRL)
ACRH7
ACRL7
READ
BIT 7
Figure 9-4. Alternate Counter Block Diagram
1
1
ACRH6
ACRL6
ACRH ($001A)
BIT 6
1
1
16-BIT COUNTER
LATCH
November 5, 1998
ACRH5
ACRL5
BIT 5
16-BIT TIMER
1
1
ACRH4
ACRL ($001B)
ACRL4
BIT 4
TMR LSB
1
1
ACRH3
ACRL3
BIT 3
1
1
ACRH2
4
ACRL2
BIT 2
1
1
INTERNAL
INTERNAL
(f
ACRH1
ACRL1
READ
ACRL
CLOCK
BIT 1
OSC
DATA
BUS
1
0
MC68HC05JB3
2)
ACRH0
ACRL0
BIT 0
REV 1
1
0