AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 105

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

The DWIO mode can be configured from the EEPROM
or programmed by the software.
Note: Even though the I/O resource mapping changes
when the I/O mode setting changes, the RDP location
offset is the same for both modes. Once the DWIO bit
has been set to 1, only H_RESET or a read of
EEPROM can clear it to 0. The DWIO mode setting is
unaffected by setting the STOP bit. Table 24 shows
how the 32 bytes of address space are used in DWord
I/O mode.
All I/O resources must be accessed in DWord quanti-
ties and on DWord addresses. A read access other
than listed in Table 25 will yield undefined data, a write
operation may cause unexpected reprogramming of
the Am79C971 control registers
After H_RESET, the Am79C971 controller is pro-
grammed to operate in Word I/O mode. DWIO (BCR18,
bit 7) will be cleared to 0. It will then be loaded by the
value in the EEPROM. Table 20 shows how the 32
bytes of address space are used in Word I/O mode.
All I/O resources must be accessed in word quantities
and on word addresses. The Address PROM locations
can also be read in byte quantities. The only allowed
DWord operation is a write access to the RDP, which
switches the device to DWord I/O mode. A read access
other than listed in the table below will yield undefined
data, a write operation may cause unexpected repro-
gramming of the Am79C971 control registers. Table 23
shows legal I/O accesses in Word I/O mode
Am79C971
.
Double Word I/O Mode
The Am79C971 controller can be configured to operate
in DWord (32-bit) I/O mode. The software can invoke
the DWIO mode by performing a DWord write access
to the I/O location at offset 10h (RDP). The data of the
write access must be such that it does not affect the in-
tended operation of the Am79C971 controller. Setting
the device into 32-bit I/O mode is usually the first oper-
ation after H_RESET or S_RESET. The RAP register
will point to CSR0 at that time. Writing a value of 0 to
CSR0 is a safe operation. DWIO (BCR18, bit 7) will be
set to 1 as an indication that the Am79C971 controller
operates in 32-bit I/O mode.
The DWIO mode can be configured from the EEPROM
or programmed by the software.
Note: Even though the I/O resource mapping changes
when the I/O mode setting changes, the RDP location
offset is the same for both modes. Once the DWIO bit
has been set to 1, only H_RESET or a read of
EEPROM can clear it to 0. The DWIO mode setting is
unaffected by setting the STOP bit. Table 24 shows
how the 32 bytes of address space are used in DWord
I/O mode.
All I/O resources must be accessed in DWord quanti-
ties and on DWord addresses. A read access other
than listed in Table 25 will yield undefined data, a write
operation may cause unexpected reprogramming of
the Am79C971 control registers
Table 22. I/O Map In Word I/O Mode (DWIO = 0)
00h - 0Fh
18h - 1Fh
Offset
10h
12h
14h
16h
No. of
Bytes
16
2
2
2
2
8
RAP (shared by RDP and BDP)
Reset Register
Reserved
Register
APROM
RDP
BDP
105