AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 140

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

7-0
CSR61: Previous Transmit Descriptor Address
Upper
Bit
31-16 RES
15-0
140
SWSTYLE
All Other
SWSTYLE
PXDAU
Name
[7:0]
00h
01h
02h
03h
Software Style register. The val-
ue in this register determines the
style of register and memory re-
sources that shall be used by the
Am79C971 controller. The Soft-
ware Style selection will affect the
interpretation of a few bits within
the CSR space, the order of the
descriptor entries and the width of
the descriptors and initialization
block entries.
Reserved locations. Written as
zeros and read as undefined.
Contains the upper 16 bits of the
previous
dress pins are always driven, re-
gardless of the state of the
SSIZE32 bit.
Note that the setting of the
SSIZE32 bit has no effect on the
defined width for I/O resources.
I/O resource width is determined
by the state of the DWIO bit
(BCR18, bit 7).
All Am79C971 controller CSR
bits and BCR bits and all descrip-
tor, buffer, and initialization block
entries not cited in Table 26 are
unaffected by the Software Style
selection and are, therefore, al-
Description
PCnet-PCI
PCnet-PCI
PCnet-ISA
Reserved
controller
controller
controller
LANCE/
Name
Style
RES
transmit
Table 26. Software Styles
P R E L I M I N A R Y
descriptor
Undefined
SSIZE32
Am79C971
0
1
1
1
CSR60: Previous Transmit Descriptor Address
Lower
Bit
31-16 RES
15-0
16-bit software structures,
non-burst or burst access
RES
32-bit software structures,
non-burst or burst access
32-bit software structures,
non-burst or burst access
Undefined
Initialization Block
PXDAL
Name
Entries
ways fully functional as specified
in the CSR and BCR sections.
Read/Write accessible only when
either the STOP or the SPND bit
is set. The SWSTYLE register will
contain the value 00h following
H_RESET and will be unaffected
by S_RESET or STOP.
Reserved locations. Written as
zeros and read as undefined.
Contains the lower 16 bits of the
previous transmit descriptor ad-
dress pointer. Am79C971 con-
troller has the capability to stack
multiple transmit frames.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
address pointer. The Am79C971
controller has the capability to
stack multiple transmit frames.
Read/Write accessible only when
either the STOP or the SPND bit
is set. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
16-bit software structures,
non-burst access only
RES
32-bit software structures,
non-burst access only
32-bit software structures,
non-burst access only
Undefined
Descriptor Ring Entries