SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 37

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SH3100IMTR

Manufacturer Part Number
SH3100IMTR
Description
Supervisory IC with I2C Interface and PWM
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
© 2006 Semtech Corp.
POWER MANAGEMENT
Register Descriptions
Register Name WDTConfig
Address(hex): 35
Bit No.
Bit 7
[1:0]
[2]
Description
AutoWDTSupend
WDTPrescaler
Bit 6
(continued)
Bit 5
Description
Bit Value
Bit 4
00
01
10
11
0
1
37
(R/W) Sets up the watchdog
Value Description
The watchdog counter, once enabled, is derived from the active
32.768 kHz source (crystal or internal), irrespective of CLK0,
and the watchdog period is always consistent and independent
of CLK0. The watchdog continues to run even when CLK0 has
been disabled
The watchdog counter, once enabled, is derived from CLK0, and
therefore suspends counting when CLK0 is disabled. This
effectively counts microprocessor cycles (and hence
instructions), and is useful to avoid the necessity for very long
watchdog periods simply to prevent watchdog activation during
long sleeps
Note that once the watchdog period has been written, thereby
activating the watchdog timer, this register can no longer be
changed
If AutoWDTSuspend = 0, then Watchdog timeout period =
(WDTPeriod+1)/128 seconds
If AutoWDTSuspend = 1, then Watchdog timeout period =
(WDTPeriod+1)*CLK0 period*256
If AutoWDTSuspend = 0, then Watchdog timeout period =
(WDTPeriod+1)/64 seconds
If AutoWDTSuspend = 1, then Watchdog timeout period =
(WDTPeriod+1)*CLK0 period*512
If AutoWDTSuspend = 0, then Watchdog timeout period =
(WDTPeriod+1)/32 seconds
If AutoWDTSuspend = 1, then Watchdog timeout period =
(WDTPeriod+1)*CLK0 period*1024
If AutoWDTSuspend = 0, then Watchdog timeout period =
(WDTPeriod+1)/16 seconds
If AutoWDTSuspend = 1, then Watchdog timeout period =
(WDTPeriod+1)*CLK0 period*2048
Note that once the watchdog period has been written, thereby
activating the watchdog timer, this register can no longer be
changed
Bit 3
AutoWDT
Suspend
Bit 2
Default Value: 0000 0000
Reset Event: P, W, B
Bit 1
WDTPrescaler
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SH3100
Bit 0

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