SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 42

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

© 2006 Semtech Corp.
POWER MANAGEMENT
Register Descriptions
Register Name DCOCode
Register Name DCOCode
Address(hex): 44
Address(hex): 45
Bit No.
Bit No.
Bit 7
[5:0]
Bit 7
[5:0]
Description
DCOCode[18:13]
THIS REGISTER IS FUSE
INITIALIZED
Description
DCOCode[12:7]
THIS REGISTER IS FUSE
INITIALIZED
Bit 6
Bit 6
(continued)
Bit 5
Bit 5
Description
Description
Bit Value
Bit Value
Bit 4
Bit 4
42
(R/W) Sets the default HFDCO
code for a free-running (non
FLL Locked) HFDCO.
Value Description
The 19-bit DCOCode defines the code and hence frequency at
which the High Frequency Digitally Controlled Oscillator (HFDCO)
starts, thereby determining its initial frequency prior to the FLL
locking it to the 32.768 kHz source. Due to the nature of the
HFDCO, the exact frequency for any one device can not be
deducted from the DCOCode, but can be read back after FLL
locking with the CoarseLock feature in the FLLConfig register,
and thereafter programmed into the fuses to ensure that the
starting frequency is very close to the target frequency
This register is set up so that CLK0 is as close as possible to the
target frequency before FLL locking
Most customers need not access this register, but it can be
used in cases where the standard SH3100 frequency (TBD) is
not suitable for the system
Note that this register may not be changed if the
App-specificFuseWP bit in the WriteProtects register is set
(R/W) Sets the default HFDCO
code for a free-running (non
FLL Locked) HFDCO.
Value Description
See description for register 44
Note that this register may not be changed if the
App-specificFuseWP bit in the WriteProtects register is set
Bit 3
Bit 3
DCOCode[18:13]
DCOCode[12:7]
Bit 2
Bit 2
Default Value: 0000 0000
Reset Event: P, W, B
Default Value: 0000 0000
Reset Event: P, W, B
Bit 1
Bit 1
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SH3100
Bit 0
Bit 0