SH3100IMTR SEMTECH [Semtech Corporation], SH3100IMTR Datasheet - Page 71

• Manufacturer Part Number: SH3100IMTR
• Description: Supervisory IC with I2C Interface and PWM
• Manufacturer: SEMTECH [Semtech Corporation]

I
The I
the 2000 Philips I
Both SCL and SDA pins are dedicated. The maximum fre-
quency of the I
of the external pull-up on SCL and SDA, and there is no
minimum frequency.
The seven-bit I
LSBs are programmed into the register. Both read and
ite protocols can use the I
tionally, the write protocol can support the non-combined
(‘normal’) format.
Combined Write Format
• Start condition (falling edge on SDA while SCL is high)
to commence the access to write the register address to
the SH3100
•
•
•
•
•
•
•
•
•
© 2006 Semtech Corp.
2
POWER MANAGEMENT
Functional Descriptions
C Interface
7-bit slave address on SDA, clocked in by SCL 1-bit
read/write indicator, set low because the follow-
ing 8 bits are the register address, written into the
SH3100
SH3100 generates ACK pulse to acknowledge slave
address
8-bit register address
SH3100 generates ACK pulse to confi rm register ad-
dress transfer
Restart condition to commence the access to write
payload data to the register address set up by the last
access
7-bit slave address
1 bit read/write indicator, set low because the follow-
ing 8 bits are the write data (payload)
SH3100 generates ACK pulse to acknowledge slave
address
The microcontroller generates 8-bit write data
2
C interface conforms to the 400kHz fast-mode of
2
2
C Slave Address is 0100xxx, and the three
C interface is determined by the strength
2
C specifi cation, acting as a slave only.
2
C combined format, and addi-
(continued)
71
•
•
Normal Write Format
•
•
•
•
•
•
•
•
•
SH3100 generates an ACK pulse, and may stretch
SCL by holding it low for up to two periods of CLK0, if
CLK0 is relatively slow compared to SCL
Stop condition (rising edge on SDA while SCL is high)
Start condition (falling edge on SDA while SCL is high)
to commence the access to write the register address
to the SH3100
7-bit slave address on SDA, clocked in by SCL
1-bit read/write indicator, set low because the follow-
ing 8 bits are the register address, written into the
SH3100
SH3100 generates ACK pulse to acknowledge slave
address
8-bit register address
SH3100 generates ACK pulse to confi rm register ad-
dress transfer
The microcontroller generates 8-bit write data
SH3100 generates an ACK pulse, and may stretch
SCL by holding it low for up to two periods of CLK0, if
CLK0 is relatively slow compared to SCL
Stop condition (rising edge on SDA while SCL is high)
www.semtech.com
SH3100