HDSP-3400 Agilent(Hewlett-Packard), HDSP-3400 Datasheet - Page 10

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HDSP-3400

Manufacturer Part Number
HDSP-3400
Description
20 mm (0.8 inch) Seven Segment Displays
Manufacturer
Agilent(Hewlett-Packard)
Datasheet
Table 5: Intel 80C88A Read Cycle Timing Parameters (Busmode = 1)
Note: HI_ADDR[4:0] is derived from the processor(80C88A) A15-A8 bus and HI_DATA[7:0] is
connected to the AD7 - AD0 bus.
#This page is only for HDM8513AP.
10
Symbol
t doz1
t doz2
t pw1
t su1
t h1
t d1
HI_ADDR [4:0]
/CE
/RE
DTACK
HI_D ATA[7:0]
Input Address and /CE Setup before /RE Inactive
Input Address and /CE Hold after /RE Inactive
/RE Low Duration
Delay from /CE to DTACK Active
Delay from /RE Inactive to DTACK in Tristate Mode
Delay from /RE Inactive to HI_DATA [7:0] Tristate Mode
F
IGURE
3: I
Z
NTEL
Parameter
80C88A R
t
d1
EAD
T
IMING
Valid
t
pw1
D
IAGRAM
t
su1
t
doz1
Min.
200
35
10
t
5
-
-
h1
t
doz2
Z
Max.
35
10
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns

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